The present invention relates to integrated circuits of the "smart power" type, which include one or more large vertical transistors ("power" devices, capable of handling large currents) together with smaller transistors which can be used to implement complex control circuits.
The device architectures and fabrication technologies used for high-density integrated circuits perform essentially all fabrication steps from a single surface of a monocrystalline silicon wafer. (Such a process may be referred to as a "planar" process.) The transistors fabricated are normally MOS or bipolar. MOS technology provides simpler fabrication and higher density, but bipolar technology provides potentially faster device speed, linearity, and fanout.
Discrete power devices commonly use vertical-current-flow transistors to control large currents with low on-state resistance, while withstanding fairly large voltages. A large variety of device technologies have been proposed for such transistors, including MOS, bipolar, and various hybrids thereof. However, such vertical transistors are inherently difficult to integrate with high density, and may be hard to isolate.